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Arasan Announces immediate availability of its UFS 5.0 Host controller IP Français

(PRNewsfoto/Arasan Chip Systems, Inc.)

News provided by

Arasan Chip Systems, Inc.

Apr 23, 2026, 11:11 ET

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Arasan announces the immediate availability of its UFS 5.0 Host Controller IP. The UFS 5.0 Host IP is already in use by Tester Companies for compliance and production testing.

SAN JOSE, Calif., April 23, 2026 /CNW/ -- Arasan extends its long history of support for JEDEC and MIPI standards with the immediate availability of UFS 5.0 Host controller IP. Arasan's UFS 5.0 Host Controller IP supports a maximum throughput of 46.694 Gbps with M-PHY HS-Gear 6 operation, providing very high data transfer rates with low power consumption for advanced mobile applications such as high end smartphone and edge AI devices.

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Arasan UFS 5.0 Host Controller IP Block Diagram. The UFS IP is available immediately for ASIC and FPGA applications.
Arasan UFS 5.0 Host Controller IP Block Diagram. The UFS IP is available immediately for ASIC and FPGA applications.

Arasan joined the UFS Association in 2010 and was the industry's first provider of a Total UFS IP solutions along with the M-PHY IP in 2011. Arasan's UFS IP has been licensed by major memory vendors and semiconductor companies since 2011. Our UFS IP is the de facto standard IP used in UFS production testers and UFS compliance testers.

Universal Flash Storage (UFS) is a JEDEC standard for high performance mobile storage devices suitable for next generation data storage. UFS is also adopted by Mobile Industry Processor Interface (MIPI) as a data transfer standard designed for mobile systems. UFS incorporates the MIPI UniPro standard as well as the MIPI Alliance M-PHY standard. Arasan has been an executive member of the MIPI Association since 2005 and provides the broadest portfolio of MIPI IP, including UNIPRO IP and M-PHY IP. 

"We are proud to extend our leadership in UFS with the announcement of our UFS 5.0 Host IP. This IP addresses the need for higher speeds in mobile applications that require a high throughput with low power consumption and low pin count. We look forward to our compliant UFS 5.0 IP proven in production testers and emulation platforms accelerating UFS 5.0 adoption in ASIC's" said Prakash Kamath, CTO at Arasan.

Arasan's UFS 5.0 Host IP joins our complete portfolio of solid state memory IP solutions including xSPI IP and PSRAM IP for the NOR Flash, eMMC controller for low throughput NAND Flash applications and NAND Flash Controller IP with seamlessly integrated PHY IP. The PHY IP are available in nodes down to 4nm on major foundries. Arasan UFS 5.0 Host IP is available for immediate licensing along with the M-PHY DFE (Digital Front End) and UFS 5.0 Software Stack. Arasan UFS 5.0 Host IP is available for use on FPGA and ASIC applications. Please contact [email protected]

For more information please visit https://www.arasan.com/products/UFS/

About Arasan: Arasan Chip Systems is a leading provider of IP for mobile storage and mobile connectivity interfaces, with over a billion chips shipped with our IP. Our high-quality, silicon-proven Total IP Solutions encompass digital IP, Analog Mixed Signal PHY IP, Verification IP, HDK, and Software. With a strong focus on mobile SoCs, we have been at the forefront of the Mobile evolution since the mid-90s, supporting various mobile devices, including smartphones, automobiles, drones, and IoT devices, with our standards-based IP.

SOURCE Arasan Chip Systems, Inc.

Media Contact: Bonnie Noufer, [email protected]

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Organization Profile

Arasan Chip Systems, Inc.

    Also from this source

  • Arasan acheives the Industrys First ASIL-D Certification for its CAN XL IP Core

  • Arasan's ultra low power MIPI D-PHY IP achieves ISO26262 Certification

  • Arasan announces the immediate availability of the industries first xSPI NOR + eMMC NAND Combo PHY IP

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