Huawei Introduces OceanStor M900 Context Memory Storage to Accelerate AI Inference in Hyperscale Data Centers

SHANGHAI, Sept. 17, 2026 /CNW/ -- At HUAWEI CONNECT 2026, David Wang, Deputy Chairman of the Board and Rotating Chairman at Huawei, officially introduced OceanStor M900 Context Memory Storage during his keynote. Designed for AI inference in hyperscale data centers, the product provides SuperPoDs with a fully shared memory space that offers PB-scale capacity and TB/s-level performance. This marks a shift in AI infrastructure from a compute-centric model to deep collaboration among compute, network, and storage. This will help unleash the computing power of SuperPoDs.

2026 has seen the accelerated transition of AI from technological breakthroughs to large-scale implementation. AI applications have evolved from chatbots to agents capable of autonomously completing complex tasks. These agents are widely adopted in critical sectors, marking the beginning of the agentic AI era.

As large models grow to 10 trillion-scale parameters, SuperPoDs are becoming the optimal choice for AI infrastructure. Mainstream large models already support context windows exceeding one million tokens, multi-turn inference and complex tasks have become the norm, and KV cache data generated during inference continues to grow. These trends have pushed on-chip memory and DRAM beyond their limits in capacity and cost-effectiveness. It has become an industry consensus to build a multi-tier storage system that coordinates on-chip memory, DRAM, and SSDs to create a fully shared memory space with massive capacity.

Huawei introduced OceanStor M900 Context Memory Storage to overcome the memory capacity bottlenecks in ultra-long context and multi-turn inference. OceanStor M900 uses the UnifiedBus network to build PB-scale, global multi-tier KV cache with one-hop connections. This fully unleashes the computing power potential of SuperPoDs and accelerates AI inference in hyperscale data centers. OceanStor M900 Context Memory Storage has three key capabilities:

Breaking Capacity Boundaries to Empower Large-Scale AI with Massive Memory

Powered by the high-speed UnifiedBus interconnect network, the KV cache achieves global pooling and sharing with tiered storage. The KV cache of SuperPoDs is expanded from on-chip memory and DRAM to SSDs, enabling a single cluster to deliver 64 PB of capacity. The available KV cache capacity per NPU is upgraded from gigabytes to terabytes, allowing more context to be stored, shared, and reused. This significantly boosts the KV cache hit ratio.

Boosting Inference Performance to Fully Unleash Computing Power

OceanStor M900 is the industry's first architecture to integrate the CPU, network controller unit, and NAND controller unit. It provides native KV semantics to enable one-hop connection from the SuperPoD's NPU to SSDs. This eliminates the need for protocol conversion and CPU forwarding, slashing access latency from milliseconds to 60 microseconds, a 90% reduction. A single cluster delivers 40 TB/s of aggregate access bandwidth, 1.5 times higher than peer solutions. In typical AI programming scenarios, this architecture doubles the inference cluster's token throughput and halves the time to first token, converting computing power into productivity.

Lowering Token Costs to Enable  Economical Large-Scale AI Adoption

OceanStor M900 uses the industry's first KV-aware adaptive storage technology, which predicts KV cache lifecycles based on data value and intelligently distributes data across storage media. This technology enables up to 24 drive writes per day (DWPD), extending SSD endurance by 16 times and ensuring stability for three years. By reducing media replacement and O&M costs, it lowers the long-term costs of large-scale AI inference infrastructure and enables faster AI adoption.

As AI expands into major production systems in all manner of industries, AI infrastructure is evolving from a compute-centric model toward tighter compute-network-storage collaboration. Context memory storage will be essential for continually enhancing the capacity and access efficiency of hyperscale inference KV caches.

SOURCE Huawei

Yishan Chen, [email protected]