Toshiba to Demonstrate Prototype of New ''SpursEngine(TM)'' Processor at CEATEC JAPAN 2007



    -- Derived from Cell/B.E. (TM) Technology, Will Be Applied to Video
Processing --

    TOKYO, September 20 /CNW/ - Toshiba Corporation today announced
development of the "SpursEngine(TM)", a high-performance stream processor
integrating Synergistic Processing Element (SPE) cores derived from the Cell
Broadband Engine(TM) (Cell/B.E.(TM)). The SpursEngine is expressly designed to
bring the powerful capabilities of the Cell/B.E. technology to consumer
electronics, and to take video processing in digital consumer products to new
levels of realism and image quality.

    The prototype of SpursEngine will be unveiled at CEATEC JAPAN 2007, at
Makuhari Messe, Japan, from October 2nd. Notebook PCs integrating SpursEngine
will be used in the world's first public demonstration of the processor's
capabilities in 3D image processing and manipulation: real-time
transformations of hair styles and makeup that instantaneously recognize and
process changes in position, angle, and facial expression, and render them as
computer graphics. Toshiba also plans to demonstrate concept notebook PCs
integrating the SpursEngine.

    SpursEngine, a co-processor that works in cooperation with a host CPU,
fuses Cell/B.E.'s high performance multi-core technology with Toshiba's
advanced image processing technology to perform stream processing of video
sources -- image recognition and processing -- at the increasingly
sophisticated level required by new generations of digital consumer products.

    The new co-processor integrates four of Cell/B.E.'s high performance RISC
core SPEs, half the number of the full configuration, plus hardware dedicated
to decoding and encoding MPEG-2 and H.264 video. By combining the high level,
real time processing software of the SPEs with the hardware video codecs, the
SpursEngine realizes an optimized balance of processing flexibility and low
power consumption. The prototype of SpursEngine operates at a clock frequency
of 1.5GHz and consumes power at 10 to 20 watts.

    SpursEngine also adopts XDR(TM) DRAM memory as working memory, achieving
support of high data transfer rates, for large volumes of media data.

    Toshiba will bring SpursEngine to market after CEATEC, for application in
various digital consumer products, and for use by customers and Toshiba
itself, as soon as it completes specifications for commercial production.

    About Cell Broadband Engine

    The revolutionary Cell/B.E., jointly developed by IBM, Sony Group and
Toshiba, is a breakthrough design featuring a central processing core based on
IBM's Power Architecture technology and eight synergistic processing elements
(SPE). Cell/B.E. brings an unseen level of broadband processing power to
digital products.

    About SPE

    Synergistic Processor Element is a processor core that has high
performance floating point computation capability with an original instruction
set architecture, for optimized processing of multiple media applications.

    
    Outline of Prototype
    ----------------------------------------------------------------------
    Processor             Four SPEs
    ----------------------------------------------------------------------
    SPE                   Fully compatible with SPU instruction set
                           architecture of Cell/B.E. (SIMD RISC processor
                           architecture, 8/16/32bit integer, single/double
                           precision floating point), 256KB local storage,
                           embedded DMAC function/MMU function
    ----------------------------------------------------------------------
    Memory Interface      For working memory (XDR(TM) DRAM), data width of
                           32 bits
    ----------------------------------------------------------------------
    Hardware Video Codec  (1) Full HD compatible MPEG-2 encoder and
                           decoder
                          (2) Full HD compatible H.264 encoder and decoder
    ----------------------------------------------------------------------
    PCI Express Interface x4, x2, x1 link support
                          Compliant with PCI Express(TM) base
                           specification revision 1.1
    ----------------------------------------------------------------------
    

    1: XDR(TM) DRAM is a trademark of Rambus Inc. in the United States and
other countries.

    2: SpursEngine and the logo are trademarks of Toshiba Corporation.

    3: Cell Broadband Engine and Cell/B.E. are trademarks of Sony Computer
Entertainment Inc.

    MULTIMEDIA AVAILABLE:
http://www.businesswire.com/cgi-bin/mmg.cgi?eid=5497880




For further information:

For further information: Toshiba Corporation Kaori Hiraki,
+81-3-3457-2105 Corporate Communications Office
http://www.toshiba.co.jp/contact/media.htm

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